The present invention relates to apparatus used for the test of semiconductor devices. Specifically, the present invention relates to apparatus which facilitate the creation of a temporary electrical connection with semiconductor devices for the purpose of testing the functionality of the semiconductor devices. More specifically, the present invention provides methods and apparatus for establishing the physical and electrical relationship between a test computer's test head and a probe card for the purpose of testing the functionality of semiconductor devices while they are in the form of wafers.
The common practice of the manufacturers of semiconductor products is to 100% test their products prior to shipping them to their customers. These tests are performed both at the wafer level ("wafer sort"), where the semiconductors are still in the form in which they were manufactured, and at the package level ("package sort"), after the wafer has been sawn up and the individual chips have been mounted into their protective carriers. To perform these tests, a temporary, non-destructive electrical connection must be formed between the semiconductor device and the testing apparatus. The device used to perform this function at the wafer sort stage is generically known as a "wafer probe card".
Individuals with ordinary skill in the art will be familiar with the various types of wafer probe cards. Such an individual would also be familiar with the conventional assemblies used to interface, both mechanically and electrically, the semiconductor test computer's "test head" with an automated wafer prober in which a wafer probe card is positioned. The purpose of a test head is to place the high speed "test electronics" needed to test certain types of electronic devices as close as possible to the device-under-test (DUT). This shorter path greatly facilitates the passing of signals between the test electronics and the DUT.
The physical relationship between the test head and the wafer prober has, historically, been problematic. The electrical connection between the test head and the wafer prober is generally a rigid member and a number of inventions have been created with the goal of forcing the test head and prober into an idealized physical relationship as described in U.S. Pat. No. 4,589,815 (Smith), the entire specification of which is incorporated herein by reference for all purposes. Unfortunately, these rigid systems are generally either unwieldy or unsuccessful in their goal of forcing the test head and the prober into alignment. The result of this is a lack of reliable electrical contact between the test head and the probe card. Another undesirable result of this technique is warping of probe cards due to the forces induced on them either directly by the test head or by the Prober-Tester Interface (PTI).
As shown in FIG. 1, a typical Prober-Tester Interface System 100 consists of the following. An interface ring assembly 102 mounts into a top plate 104 of a wafer prober (not shown). Top plate 104 is commonly referred to as a "ring carrier" or "head plate". Interface ring assembly 102 receives a probe card assembly 108 and provides alignment features for both probe card assembly 108 and PTI 110, it may also include a clamping mechanism 111 for PTI 110. PTI 110 is a rigid assembly of isolated electrically conductive paths which translates the pattern of contact pads on probe card assembly 108 to a "load board" 112. Load board 112 fans out the contact pattern of probe card 108 to the pattern of the contacts which connect to the high speed test electronics in a test head (not shown). Load board 112 also provides space for passive components ("loads") and relays which interact with and condition the signals between the test head and the device-under-test (DUT). The final component of PTI system 100 is test head docking hardware (not shown), a specific implementation of which is described in the above-referenced U.S. Patent. As will be discussed, each test head manufacturer provides its own proprietary hardware for coupling the load board to the test head.
A technique called "direct docking" proposed by Motorola suggests that the test head should be simultaneously aligned and docked to the prober using a kinematic coupling alignment system. This concept would replace the conventional test head docking hardware. In general terms, such an approach suggests that the PTI would somehow capture the probe card and hold it in place against the bottom of the test head. This removes the need for a "ring carrier" or "head plate". The test head would remain in place on top of the wafer prober at all times, only to be undocked when it needed to be serviced. Such an approach would be highly advantageous, in that it would allow for the test head to be repeatably and accurately aligned to the wafer prober, something that other test head docking systems have tried with inconsistent levels of success.
It is therefore desirable to provide methods and apparatus by which direct docking as discussed above may be made a practical reality at a reasonable cost.